This U.S. nonprovisional patent application claims priority under 35 U.S.C. § 119 of Korean Patent Application 2002-58056 filed on Sep. 25, 2002, the entire contents of which are hereby incorporated by reference.
1. Field of the Invention
The present invention generally relates to semiconductor package assembly technology and, more particularly, to an area array type semiconductor package and 3-dimensional stack of area array type packages.
2. Description of the Prior Art
The electronic industry continues to seek products that are lighter, faster, smaller, multi-functional, more reliable and more cost-effective. In an effort to meet such requirements, package assembly techniques have been developed for multi-chip packages (MCP) and chip stack packages. These types of packages combine two or more semiconductor chips in a single package, thereby realizing increased memory density, multi-functionality and/or reduced package footprint.
The use of several chips in a single package does, however, tend to reduce both reliability and yield. If, during post assembly testing, just one chip in the multi-chip or chip stack package fails to meet the functional or performance specifications, the entire package fails, causing the good chip(s) to be discarded along with the failing chip. As a result, multi-chip and chip stack package tend to lower the productivity from the assembly process.
A 3-dimensional package stack addresses this yield problem by stacking several assembled packages that each contain a single chip and that have already passed the necessary tests, thereby improving the yield and reliability of the final composite package. However, package stacks have tended to use lead frame type packages rather than area array type packages. Lead frame type packages typically utilize edge-located terminals such as outer leads, whereas area array type packages typically utilize surface-distributed terminals such as solder balls. Area array type package may therefore provide larger terminal counts and/or smaller footprints when compared with corresponding lead frame type packages.